1. Field of the Invention
The present invention generally relates to an ECL-CMOS (Emitter-Coupled Logic/Complementary Metal Oxide Semiconductor) level conversion circuit for converting an ECL-level signal into a CMOS-level signal, and more particularly to an ECL-CMOS level conversion circuit including CMOS circuits.
2. Description of the Prior Art
Recently the operating speed of integrated circuits has been increased, and accordingly an interface circuitry operating with low-amplitude signals like those of ECL has been required. Particularly, there are recent development trends to design circuit configurations in which a logic circuit is formed by a CMOS circuit of low power consumption and high integration density and an interface between the logic circuit and an external circuit is established by a level conversion circuit.
Various ECL-CMOS or CMOS-ECL level conversion circuits using Bi-CMOS (Bipolar/CMOS) circuits have been proposed (for example, Japanese Laid-Open Patent Application No. 3-283813). An ECL interface is capable of transferring data at a speed of 100 MHz or higher.
An ECL-CMOS level conversion circuit of a CMOS configuration is known (for example, Japanese Laid-Open Patent Application No. 63-15519). Normally, the design of CMOS circuits is more complicated than that of Bi-CMOS circuits because the operation characteristics of CMOS circuits are less stable than those of Bi-CMOS circuits. Further, the operating speed of CMOS circuits are lower than that of Bi-CMOS circuits. On the other hand, CMOS circuits can be formed on a chip by a production process simpler than that of Bi-CMOS circuits.
Most recently proposed ECL-CMOS level conversion circuits have the CMOS configuration. However, since the CMOS circuits can be easily formed on a chip, it is desired to provide an ECL-CMOS level conversion circuit of the CMOS type capable of stably operating at a high speed.